LG Innotek Unveils Copper Post Technology for Smaller, Cooler RF-SiP Substrates

June 25, 2025，LG Innotek (KRX: 011070) has announced the successful development of the world’s first Copper Post (Cu-Pos...

Smartkem and Manz Asia Collaborate on AI Chip Packaging Innovation

Smartkem and Manz Asia Collaborate on AI Chip Packaging InnovationManchester, England – July 9, 2025 – Smartkem (Nasdaq:...

TSMC Flies Arizona Chips to Taiwan for Packaging, Exposing U.S. Supply Chain Gaps

The United States’ efforts toward semiconductor self-sufficiency continue to face critical challenges. According to a ne...

Aptos Technology Files for Bankruptcy Amid Mounting Losses in NAND Flash Packaging and SiP Assembly

On June 24, Taiwan-listed company TMC (2338.TW) announced that its indirectly held subsidiary Aptos Technology, in which...

ASE Technology Weighs US Expansion in Advanced Chip Packaging Amid Tariff Uncertainty

ASE Technology Holding Inc., the world’s largest semiconductor packaging and testing provider, said on June 25 it is car...

SK hynix Expands Chip Packaging Capacity with New Back-End Plant in South Korea | Advanced Semiconductor Packaging News

SK hynix Inc. is accelerating its presence in the advanced chip packaging sector with a newly planned semiconductor back...

Huawei’s Quad-Chiplet Patent for Ascend 910D Signals Advanced AI Packaging Ambitions

Backed by founder Ren Zhengfei’s belief in advanced packaging as a means to overcome current semiconductor restrictions,...

Taiwan Blacklists Huawei and SMIC, Tightening Controls on AI Chip Technology

Taiwan has formally blacklisted Huawei Technologies and Semiconductor Manufacturing International Corporation (SMIC), ma...

TSMC Accelerates Development of CoPoS Packaging Technology to Meet AI Chip Demand

Taiwan Semiconductor Manufacturing Company (TSMC) is advancing its next-generation advanced packaging technology, CoPoS ...

SpaceX Plans Texas-Based Chip Packaging Facility with FOPLP Technology

June 2025 – Texas, USA — SpaceX is making strategic moves toward semiconductor vertical integration by preparing to ente...